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 TCD2704D
Preliminary
TOSHIBA CCD Linear Image Sensor CCD (charge coupled device)
TCD2704D
The TCD2704D is a high sensitive and low dark current 7500 elements x 4 line CCD color image sensor which includes CCD drive circuit, clamp circuit. The sensor is designed for scanner. The device contains a row of 7500 elements x 4 line photodiodes which provide a 24 lines/mm across a A3 size paper. The device is operated by 5 V pulse and 12 V power supply.
Features
* * * * * * * * * Number of image sensing elements: 7500 elements x 4 line Image sensing element size: 5 m x 5 m on 5 m centers Photo sensing region: High sensitive PN photodiode Distanced between photodiode array: Color (40 m, 8 lines), B/W-color (60 m, 12 lines) Clock: 2 phase (5 V) Power supply: 12 V power supply voltage Internal circuit: Clamp circuit Package: 22 pin CERDIP package Color filter: Red, green, blue Weight: 5.2 g (typ.)
Pin Connections (top view)
OS3 SS 1 2 3 4 Red Green Blue Black & White 5 6 7 8 9 7500 7500 7500 7500 1 1 1 1 22 21 20 19 18 17 16 15 14 13 12 OS2 OS1 OD SS
SW 1
Maximum Ratings (Note 1)
Characteristic Clock pulse voltage Shift pulse voltage Reset pulse voltage Clamp pulse voltage Changeover switch voltage Power supply voltage Operating temperature Storage temperature Symbol V VSH
V RS V CP V SW
Rating
Unit
RS
V V -0.3~8.0 V V V -0.3~15 0~60 -25~85 V C C 2A2 1A2 2A1 1A1 SH0 SH1
CP
SW 2
1A3 SS
2A3 NC
VOD Topr Tstg
Note 1: All voltage are with respect to SS terminals (ground).
SH3 10 SH2 11
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TCD2704D
Circuit Diagram
OD 20 SS 19
SW 1
1A3 2A3 6 17
18
Clamp SW1
CCD ANALOG SHIFT REGISTER (EVEN) SHIFT GATE SH0 PHOTO DIODE (Black & White) S7498 S7499 S7500 D128 148 D149 D125 D126 D127 S1 S2 D26 D27 D28 13 SH0
SHIFT GATE SH0 Clamp SW1 PHOTO DIODE (blue) S7498 S7499 S7500 D128 148 D149 D125 D126 D127 S1 S2 D26 D27 D28 CCD ANALOG SHIFT REGISTER (ODD)
SHIFT GATE SH1 SW2 OS1 21 Clamp D26 D27 D28 CCD ANALOG SHIFT REGISTER PHOTO DIODE (green) S7498 S7499 S7500 D128 148 D149 D125 D126 D127 S1 S2
12 SH1 14 1A1 15 2A1
SHIFT GATE SH2 SW2 OS2 22 Clamp D26 D27 D28 CCD ANALOG SHIFT REGISTER PHOTO DIODE (red) S7498 S7499 S7500 D128 148 D149 D125 D126 D127 S1 S2
11 SH2
SHIFT GATE SH3 OS3 1 Clamp CCD ANALOG SHIFT REGISTER
10 SH3
5
SW 2
4
CP
3
RS
7 SS
9
8
1A2 2A2
Pin Names
OS3 SS
RS CP SW 2
Signal Output 3 (red) Ground Reset Gate Clamp Gate Changeover Switch 2 (color and B/W) Clock 3 (phase 1) Ground Clock 2 (phase 2) Clock 2 (phase 1) Shift Gate 3 Shift Gate 2
OS2 OS1 OD SS
SW 1
Signal Output 2 (green) Signal Output 1 (blue) Power Ground Changeover Switch 1 (color and B/W) Clock 3 (phase 2) Non Connection Clock 1 (phase 2) Clock 1 (phase 1) Shift Gate 0 Shift Gate 1
1A3 SS 2A2 1A2 SH3 SH2
2A3 NC 2A1 1A1 SH0 SH1
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TCD2704D
Optical/Electrical Characteristics
(Ta = 25C, VOD = 12 V, V = VRS = VSH = VCP = 5 V (pulse), f = 1.0 MHz, fRS = 1.0 MHz, LOAD RESISTANCE = 100 k, tINT (INTEGRATION TIME) = 10 ms, LIGHT SOURCE = A LIGHT SOURCE + CM500S FILTER (t = 1.0 mm))
Characteristics Symbol RB/W Sensitivity RR RG RB PRNU (1) Photo response non uniformity PRNU (3) Image lag Saturation output voltage (B/W) Saturation output voltage (color) Saturation exposure Dark signal voltage Dark signal non uniformity DC power dissipation Total transfer efficiency Output impedance DC signal output voltage Random noise Reset noise IL VSAT (B/W) VSAT (color) SE VDRK DSNU PD TTE ZO VOS ND VRSN Min 8.6 3.2 3.7 1.9 1.5 2.0 92 5.0 Typ. 10.8 4.6 5.4 2.8 10 3 1 2.0 2.5 0.19 0.4 7 525 0.3 6.0 1.0 0.5 Max 13.0 6.0 7.1 3.7 20 12 2.0 12 650 1.0 7.0 1.0 % mV % V V lx s mV mV mW % k V mV V (Note 3) (Note 4) (Note 5) (Note 6) (Note 6) (Note 7) (Note 8) (Note 8) (Note 9) (Note 10) (Note 9) V/(lx s) (Note 2) Unit Note
Note 2: Sensitivity is defined for each color of signal outputs average when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. Note 3: PRNU (1) is defined for each color on a single chip by the expressions below when the photosensitive surface is applied with the light of uniform illumination and uniform color temperature. X PRNU (1) = x 100 (%) X When X is average of total signal output and X is the maximum deviation from X . The amount of incident light is shown below. 1 1 1 Ped = SE, Green = SE, Blue = SE 2 2 4 Note 4: PRNU (3) is defined as maximum voltage with next pixel, where measured 5% of SE (typ.)
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TCD2704D
Note 5: Image lag is defined as follows.
SH ON LED OFF
OS Image lag Signal (500 mV)
Note 6: VSAT is defined as minimum saturation output of all effective pixels. V Note 7: Definition of SE: SE = SAT (lx s) RB/W Note 8: VDRK is defined as average dark signal voltage of all effective pixels. DSNU is defined as different voltage between VDRK and VMDK when VMDK is maximum dark signal voltage.
VDRK VMDK DSNU
Note 9: DC signal output voltage and reset noise is defined as follows, but reset noise is a fixed pattern noise.
VRSN
OS
VOS
SS
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TCD2704D
Note 10: Random noise is defined as the standard deviation (sigma) of the output level difference between two adjacent effective pixels under no illumination (i.e. dark conditions) calculated by the following procedure.
video output video output
200 ns 200 ns pixel (n) V
pixel (n + 1)
Output waveform (effective pixels under dark condition)
(1) (2) (3) (4)
Two adjacent pixels (pixel n and n + 1) in one reading are fixed as measurement points. Each of the output level at video output periods averaged over 200 ns period to get V (n) and V (n + 1). V (n + 1) is subtracted from V (n) to get V. V = V (n) - V (n + 1) The standard deviation of V is calculated after procedure (2) and (3) are repeated 30 times (30 readings) V = 1 | Vi | 30 i =1
30
=
2 1 (| Vi | V ) 30 i =1
30
(5) (6)
Procedure (2), (3) and (4) are repeated 10 times to get sigma value. 10 sigma values are averaged. = 1 j 10 j=1
10
(7)
value calculated using the above procedure is observed 2 times larger than that measured relative to the ground level. So we specify random noise as follows. N D = 1 2
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TCD2704D
Operating Condition
Characteristics Clock pulse voltage "H" Level "L" Level "H" Level Shift pulse voltage "L" Level "H" Level Reset pulse voltage "L" Level "H" Level Clamp pulse voltage "L" Level "H" Level Switch pulse voltage "L" Level Power supply voltage
V SW V CP V RS
Symbol VA
Min 4.5 0 4.5
Typ. 5.0 5.0 5.0 5.0 5.0 12.0
Max 5.5 0.5 5.5
Unit V
Note
VSH
V 0.5 5.5 V 0.5 5.5 V 0.5 5.5 V 0.5 13.0 V
0 4.5 0 4.5 0 4.5 0 11.4
VOD
Clock Characteristics (Ta = 25C)
Characteristics Clock pulse frequency Reset pulse frequency Clamp pulse frequency Clock1 capacitance Clock2 capacitance Shift gate capacitance Reset gate capacitance Clamp gate capacitance Switch gate capacitance (Note 11) (Note 11) Symbol f
f RS f CP
Min 0.3 0.3 0.3
Typ. 1.0 1.0 1.0 260 210 30 10 10 10
Max 12 12 12 390 315 60 40 40 40
Unit MHz MHz MHz pF pF pF pF pF pF
C1 C2 CSH
CRS CCP CSW
Note 11: VOD = 12 V
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TCD2704D
Timing Chart 1: Bit Clamp Mode (color or B/W mode)
tINT (integration time)
SH
1A
2A
RS
CP
S3686
S3687
S3688
S3689
S3690
S7500
S3696
S3697
S3698
D126
D127
D128
D129
D131
D149
D121
D122
D123
D124
D125
D130
D132
D133
D134
D145
D146
D147
D148
D25
D61
D62
D63
D64
D12
D13
D26
D60
D0
D1
S1
OS1, 2, 3 (color)
DUMMY OUTPUTS (26 elements)
LIGHT SHIELD OUTPUTS (96 elements) DUMMY OUTPUTS (128 elements)
DUMMY OUTPUTS (6 elements) SIGNAL OUTPUTS (7500 elements) 1 LINE READOUT PERIOD (7650 elements) (6 elements)
(12 elements)
TEST OUTPUTS (1 elements) DUMMY OUTPUTS (3 elements)
DUMMY OUTPUTS (22 elements)
S7499
D126
D120
D122
D124
D128
D130
D132
D134
D146
D148
S115
S117
S119
S121
S123
S125
S127
S129
D50
D52
D24
D26
D0
D2
S1
OS2 (B/W)
S7500
D127
D121
D123
D125
D129
D131
D133
D135
D147
D149
S116
S118
S120
S122
S124
S126
S128
S130
D51
D53
D25
D27
D1
D3
S2
OS1 (B/W)
DUMMY OUTPUTS (13 elements)
LIGHT SHIELD OUTPUTS (3 elements) (48 elements) SIGNAL OUTPUTS (3750 elements) 1 LINE READOUT PERIOD (3825 elements)
(3 elements)
DUMMY OUTPUTS (6 elements) TEST OUTPUT (1 element) DUMMY OUTPUT (1 element) DUMMY OUTPUTS (11 elements)
DUMMY OUTPUTS (64 elements)
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TCD2704D
Timing Chart 2: Line Clamp Mode (color or B/W mode)
tINT (integration time)
SH
1A
2A
RS
CP = SH
CP = "H"
S3686
S3687
S3688
S3689
S3690
S7500
S3696
S3697
S3698
D126
D127
D128
D129
D131
D149
D121
D122
D123
D124
D125
D130
D132
D133
D134
D145
D146
D147
D148
D25
D61
D62
D63
D64
D12
D13
D26
D60
D0
D1
S1
OS1, 2, 3 (color)
DUMMY OUTPUTS (26 elements)
LIGHT SHIELD OUTPUTS (96 elements) DUMMY OUTPUTS (128 elements)
DUMMY OUTPUTS (6 elements) SIGNAL OUTPUTS (7500 elements) 1 LINE READOUT PERIOD (7650 elements) (6 elements)
(12 elements)
TEST OUTPUTS (1 elements) DUMMY OUTPUTS (3 elements)
DUMMY OUTPUTS (22 elements)
S7499
D126
D120
D122
D124
D128
D130
D132
D134
D146
D148
S115
S117
S119
S121
S123
S125
S127
S129
D50
D52
D24
D26
D0
D2
S1
OS2 (B/W)
S7500
D127
D121
D123
D125
D129
D131
D133
D135
D147
D149
S116
S118
S120
S122
S124
S126
S128
S130
D51
D53
D25
D27
D1
D3
S2
OS1 (B/W)
DUMMY OUTPUTS (13 elements)
LIGHT SHIELD OUTPUTS (3 elements) (48 elements) SIGNAL OUTPUTS (3750 elements) 1 LINE READOUT PERIOD (3825 elements)
(3 elements)
DUMMY OUTPUTS (6 elements) TEST OUTPUT (1 element) DUMMY OUTPUT (1 element) DUMMY OUTPUTS (11 elements)
DUMMY OUTPUTS (64 elements)
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TCD2704D
D148 D146 D147
D149
D134 D132 D130 D128 S7499 S7500 D129 D131 1 LINE READOUT PERIOD (3825 elements) D133
D135
S1 D126 D124 D122 D120 D121 D123 D125 D127
S2
D26 D24 OS1 (B/W) OS2 (B/W) D25
D27
D2 D0 D1
D3
D149 D148 D147 D146 D145
D149 D148 D147 D146 D145
D134 D133 tINT (integration time) D132
D134 1 LINE READOUT PERIOD (7650 elements) D133 D132
D128 S7500
D128 S7500
S1 D127
S1 D127
D123 D122 D121
D123 D122 D121
D26
D26 D25 D25
Timing Chart 3 (color B/W mode)
D1 D0
D1 D0
1A
SH
OS1 (blue)
2A
RS
CP
SW 2
SW1
OS2 (green)
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TCD2704D
Timing Requirements
t2 SH t1 1A t5 2 GND 3.5 V (max) 1.5 V (min) t3 t4
1
RS
t6
CP
t7
CP = SH (line clamp mode)
t8 B/W Color mode: SW 1 ("L" "H") Color B/W mode: SW 2 ("L" "H") B/W Color mode: SW 2 ("H" "L") Color B/W mode: SW 1 ("H" "L")
1 t9 2
10% t10
10% t11 t12 90% t14 t16 t15 t17 90% t20 10% to the peak
RS
t13
CP
t18
t19
OS (bit clamp mode)
Peak 10% Video signal 10% to the peak
OS (line clamp mode)
t21
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TCD2704D
Timing Requirements (cont.)
Characteristics Pulse timing of SH and 1 SH pulse rise time, fall time SH pulse width Pulse timing of SH and CP Pulse timing of SH and CP (line clamp mode) Pulse timing of SH and SW 1, 2 pulse rise time, fall time
RS pulse rise time, fall time RS pulse width
Symbol t1 t5 t2, t4 t3 t6 t7 t8 t9, t10 t11, t12 t13 t14 t15 t16, t17 t18 t19 (Note 14) t20 t21
Min 120 800 0 3000 200 10 100 0 0 10 (20) 0 0 0 30 (3000)
Typ. (Note 12) 1000 1000 50 5000 500 100 500 50 20 80 40 20 20 80 (5000) 20 20 30
Max t3 - 100 40 (Note 16) 40 (Note 15) 50 (Note 16)
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Pulse timing of RS and CP Pulse timing of 1A, 2A and CP
CP pulse rise time, fall time CP pulse width
(Note 13)
Reference level settle time (bit clamp mode) Video data delay time Reference level settle time (line clamp mode)
Note 12: Typ. is the case of f RS = 1.0 MHz. Note 13: Line clamp Mode inside ( ). Note 14: Load Resistance is 100 k. Note 15: Typical settle time to about 1% of final value. Note 16: Typical settle time to about 1% of the peak.
Clamp Mode
Clamp Means Bit clamp Line clamp
CP Input Pulse CP Pulse
"H" or SH
Changeover Switch Mode
Output Type Color B/W
SW1 Input Pulse SW 2 Input Pulse
"H" "L"
"L" "H"
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TCD2704D
Typical Spectral Response
Spectral response
1.0 Ta = 25C 0.8 Red
Relative response
0.6
Blue Green
0.4
0.2
0 400
450
500
550
600
650
700
Wavelength
(nm)
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TCD2704D
Typical Drive Circuit
+5 V 1 F/25 V 47 F/25 V
SW 1
12 V
SW 2
1 F/25 V +5 V
IC5
47 F/25 V
1 F/25 V 47 F/25 V
1A1
2A1 22 21 20 19 SS 18 17 16 15 14 13 12 IC1 +5 V 2A2 1A2 SH3 SH2 8 9 10 11 1A2 1 F/25 V 47 F/25 V
OS2 OS1 OD
SW 1 2A3
NC 2A1 1A1 SH0 SH1
TCD2704D OS3 SS 1 2
RS CP
SW 2 1A3
SS 7
3
4
5
6
2A2
IC2 +5 V 1 F/25 V 47 F/25 V
1A3
2A3 12 V 1 F/25 V IC3 47 F/25 V +5 V 1 F/25 V 47 F/25 V SH0 SH1 SH2 SH3
CP
OS1 OS2 OS3
IC1, 2, 3 : TC74AC04 IC4, 5 : TC74HC04
RS
IC4
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TCD2704D
Caution
1. Window Glass
The dust and stain on the glass window of the package degrade optical performance of CCD sensor. Keep the glass window clean by saturating a cotton swab in alcohol and lightly wiping the surface, and allow the glass to dry, by blowing with filtered dry N2. Care should be taken to avoid mechanical or thermal shock because the glass window is easily to damage.
2. Electrostatic Breakdown
Store in shorting clip or in conductive foam to avoid electrostatic breakdown. CCD Image Sensor is protected against static electricity, but interior puncture mode device due to static electricity is sometimes detected. In handing the device, it is necessary to execute the following static electricity preventive measures, in order to prevent the trouble rate increase of the manufacturing system due to static electricity. a. Prevent the generation of static electricity due to friction by making the work with bare hands or by putting on cotton gloves and non-charging working clothes. b. Discharge the static electricity by providing earth plate or earth wire on the floor, door or stand of the work room. c. Ground the tools such as soldering iron, radio cutting pliers of or pincer. It is not necessarily required to execute all precaution items for static electricity. It is all right to mitigate the precautions by confirming that the trouble rate within the prescribed range.
3. Incident Light
CCD sensor is sensitive to infrared light. Note that infrared light component degrades resolution and PRNU of CCD sensor.
4. Lead Frame Forming
Since this package is not strong against mechanical stress, you should not reform the lead frame. We recommend to use a IC-inserter when you assemble to PCB.
5. Soldering
Soldering by the solder flow method cannot be guaranteed because this method may have deleterious effects on prevention of window glass soiling and heat resistance. Using a soldering iron, complete soldering within ten seconds for lead temperatures of up to 260C, or within three seconds for lead temperatures of up to 350C.
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TCD2704D
Package Dimensions
Weight: 5.2 g (typ.)
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TCD2704D
RESTRICTIONS ON PRODUCT USE
000707EBA
* TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice.
16
2001-04-13


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